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Implementing C algorithms in reconfigurable hardware using C2Verilog

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2 Author(s)
D. Soderman ; CompiLogic Corp., San Jose, CA, USA ; Y. Panchul

A new full featured ANSI C to synthesizable RTL Verilog compiler, C2Verilog, was used to implement several system-level algorithms in a variety of IC implementations. This paper discusses the results achieved implementing a compression-decompression, a prime number generation, and a sorting algorithm in reconfigurable hardware

Published in:

FPGAs for Custom Computing Machines, 1998. Proceedings. IEEE Symposium on

Date of Conference:

15-17 Apr 1998