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An overview of the COBRA-ABS high level synthesis system for multi-FPGA systems

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3 Author(s)
A. A. Duncan ; Dept. of Eng., Aberdeen Univ., UK ; D. C. Hendry ; P. Gray

This paper presents an overview of the COBRA-ABS behavioural high-level synthesis tool. COBRA-ABS has been designed to synthesise custom architectures for arithmetic intensive algorithms, specified in C, for implementation on multi-FPGA Custom Computing Machine (FCCM) platforms. It performs globally optimising high level synthesis using simulated annealing, integrating all partitioning, scheduling, binding and allocation operations in one optimisation step, and has been designed to be retargetable to different board architectures. COBRA-ABS synthesises a custom Very Long Instruction Word (VLIW) architecture for the given algorithm for implementation on the specified FCCM. The paper gives details of the architectural issues which have influenced the design of the tool, looks at how it fits into the overall design flow and reviews the fundamental concepts and implementation of the globally optimising synthesis methodology. To illustrate the operation of the tool, a number of results for synthesis of a Fast Fourier Transform algorithm are presented

Published in:

FPGAs for Custom Computing Machines, 1998. Proceedings. IEEE Symposium on

Date of Conference:

15-17 Apr 1998