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Optimizing data scheduling on processor-in-memory arrays

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4 Author(s)
Y. Tian ; Dept. of Comput. Sci. & Eng., Notre Dame Univ., IN, USA ; E. H. -M. Sha ; C. Chantrapornchai ; P. M. Kogge

In the study of PetaFlop project, Processor-in-Memory array was proposed to be a target architecture in achieving 1015 floating point operations per second computing performance. However one of the major obstacles to achieve the fast computing was interprocessor communications, which lengthen the total execution time of an application. A good data scheduling, consisting of finding initial data placement and data movement during the run-time, can give a significant reduction in the total communication cost and the execution time of the application. In this paper, we propose efficient algorithms for the data scheduling problem. Experimental results show the effectiveness of the proposed approaches. Compared with default data distribution methods such as row-wise or column-wise distributions, the average improvement for the tested benchmarks can be up to 30%

Published in:

Parallel Processing Symposium, 1998. IPPS/SPDP 1998. Proceedings of the First Merged International ... and Symposium on Parallel and Distributed Processing 1998

Date of Conference:

30 Mar-3 Apr 1998