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Physical design and assembly process development of a multichip package containing a light emitting diode (LED) array die

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8 Author(s)
Bonda, R. ; Semicond. Products Sector, Motorola Inc., Tempe, AZ, USA ; Treliant Fang ; Kaskoun, K. ; Lytle, W.H.
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This paper presents the physical design concept and process developments to construct a small module containing a chip with an array of miniature light emitting diodes (LEDs) as well as the driver control circuitry for the LED array, The module is composed of a glass substrate consisting of a fanout pattern from the input/output (I/O) bond pads of the fine pitch solder bumped LED array chip. The fanout I/O pattern of the glass terminates on a 40 mil pitch ball grid array land pattern. The LED array chip is bonded face down on the glass and underencapsulated with an optically transparent underfill. All of the driver board circuitry is on a glob top plastic ball grid array (GTPBGA) package whose solder balls are reflow attached to the assembled glass substrate and underencapsulated to provide a finished display module. To implement the module concept, fine pitch (i.e. 80 μm) 90 Pb/10 Sn solder bump technology, fluxless flip chip bonding, thin optically transparent underencapsulation technology had to be developed, as well as the development of a multichip 384 I/O 40 mil pitch GTPBGA. The solder balls on the 384 I/O GTPBGA are 30 Pb/70 In. The assembly technology and underencapsulation technology for the assembly of the glass substrate containing the LED array chip and the 384 I/O GTPBGA also had to be developed

Published in:

Components, Packaging, and Manufacturing Technology, Part B: Advanced Packaging, IEEE Transactions on  (Volume:20 ,  Issue: 4 )

Date of Publication:

Nov 1997

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