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Thermal stresses in multilayer ceramic capacitors: numerical simulations

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2 Author(s)
Scott, G.C. ; AT&T Bell Lab., Princeton, NJ, USA ; Astfalk, G.

Numerical simulations using a previously published model (see G.C. Scott and G. Astfolk, ASME J. Electron. Pack., vol.112, p.35-40, 1989) to characterize the development of thermal stresses in surface-mounted multilayer ceramic capacitors (MLCCs) are discussed. The model was used to investigate the effect of several important factors on the development of thermal stresses in MLCCs. These factors relate to the solder process temperature profile and to the MLCC printed wiring board geometry and material properties. The results indicate that the peak temperature during wave solder and the geometry and material properties of the MLCC termination have a major influence on the development of thermal stresses in MLCCs. These factors are actually a small portion of the factors commonly thought to have a significant influence on thermal stress development

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Components, Hybrids, and Manufacturing Technology, IEEE Transactions on  (Volume:13 ,  Issue: 4 )