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Architecting advanced technologies for 14nm and beyond with 3D FinFET transistors for the future SoC applications

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21 Author(s)
Keshavarzi, A. ; Adv. Technol. Archit., R&D Group, GlobalFoundries, Sunnyvale, CA, USA ; Somasekhar, D. ; Rashed, M. ; Ahmed, S.
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The idea is to integrate the transistor and physical scaling benefits to offer a cost sensitive technology platform that provides value for the SoC applications and effectively for the end users.the complexity of achieving this task to minimize the risk and TTV/TTM while addressing the difficult technical barriers. Device and circuit co-optimization enhances the SoC values measured by PPC, PPA, and Fmax.

Published in:

Electron Devices Meeting (IEDM), 2011 IEEE International

Date of Conference:

5-7 Dec. 2011