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Discusses a new single-poly flash memory cell structure on triple-well CMOS technology and new program/erase schemes with operating voltage not exceeding /spl plusmn/V/sub cc/. Conventional single-poly EPROM, although fully compatible with standard CMOS fabrication, suffers from high-voltage operation, slow programming, and incapability of electrical erase. This new flash cell and program/erase schemes are promising for low-voltage and low-power nonvolatile memory applications in CMOS mixed-signal circuits of system-on-a-chip.
Device Research Conference Digest, 1997. 5th
Date of Conference: 23-25 June 1997