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A Third-Order DT \Delta \Sigma Modulator Using Noise-Shaped Bi-Directional Single-Slope Quantizer

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2 Author(s)
Nima Maghari ; School of Electrical and Computer Engineering, University of Florida, Gainesville, FL, USA ; Un-Ku Moon

This paper describes a new analog-to-digital converter based on the traditional dual-slope ADC operation. With a small modification to the discharging phase of the dual-slope ADC, first-order quantization noise shaping is achieved. This quantizer is used in a second-order loop filter and results in an overall third-order quantization noise shaping. To remove the need for any extra active element, this quantizer is merged with the active adder. In this fashion, the multi-bit flash ADC is removed and hence the loading of the active-adder is reduced to a single continuous-time comparator. Furthermore, to alleviate the speed of the counting-clock and the common-mode biasing accuracy requirements, a bi-directional discharging scheme is proposed. As a proof of concept, the second-order loop filter with the proposed quantizer is fabricated in a 0.18 μm CMOS technology and achieves over 78 dB SNDR with an oversampling ratio of 24 and 50 MHz sampling speed. The power consumption is 2.9 mW from a 1.5 V power supply.

Published in:

IEEE Journal of Solid-State Circuits  (Volume:46 ,  Issue: 12 )