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Beyond RED: Periodic Early Detection for on-chip buffer memories in network elements

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1 Author(s)
Francini, A. ; Alcatel-Lucent Bell Labs., Mooresville, NC, USA

The scalability and energy efficiency of future network equipment will critically depend on the ability to confine the memories that implement the packet buffers within the same traffic management chips that process and forward the packets. Despite massive research efforts aimed at trimming its demand of large buffers for the accommodation of TCP traffic, the bandwidth-delay product (BDP) rule remains to-date the dominant criterion for the sizing of packet buffers in commercial network elements, and arguably the only cause for their implementation in off-chip memories. Only the lack of a valid alternative justifies the lasting popularity of conventional buffer management methods for TCP traffic such as Tail Drop and Random Early Detection (RED), which fail to reconcile small buffer sizes with high-end throughput performance. Our contribution is twofold. First, we show that the RED algorithm is intrinsically flawed because of the way it maps buffer occupancy levels onto packet drop probabilities. Second, we introduce Periodic Early Detection (PED), a buffer management scheme with touchless configuration that sustains 100% link utilization using only 2.5% of the memory required by the BDP rule. While a more comprehensive study of PED's properties is in order, the clear superiority of the scheme under common benchmarking setups places it at the forefront of the candidate enablers for the on-chip implementation of buffer memories.

Published in:

High Performance Switching and Routing (HPSR), 2011 IEEE 12th International Conference on

Date of Conference:

4-6 July 2011