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Design for manufacturability (DFM) is inevitable because of the formidable challenges encountered in nano-scale integrated circuit (IC) manufacturing. Unfortunately, it is difficult for designers to understand the cost-benefit tradeoff when tuning their design through DFM to achieve better manufacturability. This work attempts to assist the designer in this aspect by providing a methodology (called RADAR - Rule Assessment of Defect-Affected Regions) which uses failing-IC diagnosis results to systematically evaluate the effectiveness of DFM rules. RADAR is applied to the fail data from a 90nm Nvidia graphics processing unit (GPU) to demonstrate its viability. Specifically, evaluation of the via-enclosure rules revealed that they are much more needed in metal layers 3-6 than the remaining layers.