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Portability analysis of an M-JPEG decoder IP from OpenCores

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3 Author(s)
Xiaozhou Meng ; Dept. of Inf. Technol. & Media, Mid Sweden Univ., Sundsvall, Sweden ; Thornberg, B. ; Lawal, N.

The reuse of predefined Intellectual Property (IP) can shorten development times and help the designer to meet time-to-market requirements for embedded systems. Using FPGA IP in a proper way can also mitigate the component obsolescence problem. System migration between devices is unavoidable, especially for long lifetime embedded systems, so IP portability becomes an important issue for system maintenance. This paper presents a case study analyzing the portability of an FPGA-based M-JPEG decoder IP. The lack of any clear separation between computation and communication is shown to limit the decoder's portability with respect to different communication interfaces. Technology and tool dependent firmware IP components are often supplied by FPGA vendors. It is possible for these firm IP components to reduce development time. However, the use of these technology and tool dependent firmware specifications within the M-JPEG decoder is shown to limit the decoder's portability with respect to development tools and FPGA vendors.

Published in:
Industrial Embedded Systems (SIES), 2011 6th IEEE International Symposium on

Date of Conference: 15-17 June 2011

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