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The influence of inversion layer on tunneling field-effect transistors (TFETs) has been investigated. Simulation results show that drain current (ID) saturation is related to inversion layer formation. Surface channel potential (Ψ) pinning due to the inversion layer formation makes ID less sensitive to the gate voltage. Also, it has been shown that most of inversion carriers of TFETs are thermally injected from the drain. Inversion carriers supplied from the source by band-to-band tunneling are negligible.