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Action systems in pipelined processor design

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2 Author(s)
Plosila, J. ; Dept. of Appl. Phys., Turku Univ., Finland ; Sere, K.

We show that the action systems framework combined with the refinement calculus is a powerful method for handling a central problem in hardware design, the design of pipelines. We present a methodology for developing asynchronous pipelined microprocessors relying on this framework. Each functional unit of the processor is stepwise brought about which leads to a structured and modular design. The handling of different hazard situations is realized when verifying refinement steps. Our design is carried out with circuit implementation using speed-independent techniques in mind

Published in:

Advanced Research in Asynchronous Circuits and Systems, 1997. Proceedings., Third International Symposium on

Date of Conference:

7-10 Apr 1997