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A switched-current sample-and-hold circuit

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2 Author(s)
Xiaoyun Hu ; Dept. of Electr. & Comput. Eng., Toronto Univ., Ont., Canada ; Martin, K.W.

A switched-current sample-and-hold circuit is reported. The circuit was fabricated in a 0.8-μm BiCMOS process. Measurements indicate a sampling frequency of 57 MHz with 60 dB signal-to-noise-plus-distortion-ratio and suggest that operation at sampling frequencies beyond 80 MHz is feasible. Comparisons of this circuit with other switched-current sample-and-hold circuits are given to highlight the strengths and weaknesses of the circuit. The feasibility of the sample-and-hold circuit as an under-sampler intended for the Canadian CT2Plus personal communication system is also presented

Published in:

Solid-State Circuits, IEEE Journal of  (Volume:32 ,  Issue: 6 )