Notification:
We are currently experiencing intermittent issues impacting performance. We apologize for the inconvenience.
By Topic

A Josephson 10-b instruction 128-word ROM unit

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

7 Author(s)
Aoyagi, M. ; Electrotech. Lab., Tsukuba, Japan ; Nakagawa, H. ; Kurosawa, I. ; Kosaka, Shin
more authors

A Josephson instruction read-only memory unit (IROU) has been demonstrated. The IROU, which is composed of a 10-b×128-word ROM plane, a 6-64 decoder, two multiplexers, and several buffers, stores a program for the Josephson computer ETL-JC1. The ROM plane was designed using two-junction DC-SQUID-type ROM cells, in which the zero ROM cell has no junction and no superconducting loop and one ROM cell has a damping resistor. The peripheral circuits were designed using a 4JL family of OR, AND, INVERT, and AMP gates. The IROU chip was fabricated using a Nb-AlOx-Nb Josephson tunnel junction IC technology with a 3-μm design rule. There were 1280 ROM cells and 789 4JL gates integrated on the 5-mm×3.45-mm chip. All 128 words of the ROM plane could be read with a total power dissipation of 1.63 mW. The minimum total access time was measured to be 390 ps

Published in:

Solid-State Circuits, IEEE Journal of  (Volume:25 ,  Issue: 4 )