A 55-ns 16-Mb DRAM with built-in self-test function using microprogram ROM

A single 5-V power supply 16-Mb dynamic random-access memory (DRAM) has been developed using high-speed latched sensing and a built-in self-test (BIST) function with a microprogrammed ROM, in which automatic test pattern generation procedures were stored by microcoded programs. The chip was designed using a double-level Al wiring, 0.55- mu m CMOS technology. As a result, a 16-Mb CMOS DRAM with 55-ns typical access time and 130-mm/sup 2/ chip area was attained by implementing 4.05- mu m/sup 2/ storage cells. The installed ROM was composed of 18 words*10 b, where the marching test and checkerboard scan write/read test procedures were stored, resulting in successful self-test operation. As the BIST circuit occupies 1 mm/sup 2/ and the area overhead is about 1%, it proves to be promising for large-scale DRAMs.<
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