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Nonvolatile Memory by All-Around-Gate Junctionless Transistor Composed of Silicon Nanowire on Bulk Substrate

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7 Author(s)
Sung-Jin Choi ; Dept. of Electr. Eng., Korea Adv. Inst. of Sci. & Technol., Daejeon, South Korea ; Moon, Dong-Il ; Sungho Kim ; Ahn, J.-H.
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A junctionless transistor with a width of 10 nm and a length of 50 nm is demonstrated for the first time. A silicon nanowire (SiNW) channel is completely surrounded by a gate, and the SiNW is built onto the bulk substrate. The proposed junctionless transistor is applied to a Flash memory device composed of oxide/nitride/oxide gate dielectrics. Acceptable memory characteristics are achieved regarding the endurance, data retention, and dc performance of the device. It can be expected that the inherent advantages of the junctionless transistor can overcome the scaling limitations in Flash memory. Hence, the junctionless transistor is a strong candidate for the further scaling of NAND Flash memory below the 20-nm node.

Published in:

Electron Device Letters, IEEE  (Volume:32 ,  Issue: 5 )