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Product drift from NBTI: Guardbanding, circuit and statistical effects

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11 Author(s)
Anand T Krishnan ; Technology Design Integration, MS 366, Texas Instruments, Dallas 75243, USA ; Frank Cano ; Cathy Chancellor ; Vijay Reddy
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Circuits employing advanced performance and power management techniques (clock gating, half-cycle paths) are found to be much more sensitive to NBTI primarily due to differential and asymmetric aging, with a 1% transistor drift leading to as much as 3% circuit drift in some cases. For the first time, we report a monotonic reduction in variance of the log parameters (Ln(ΔF/F) and Ln(ΔID/ID)) as a function of stress time. A stochastic guard banding model accounting for time-dependent variance, re-ordering effects and granularity of data is demonstrated.

Published in:

Electron Devices Meeting (IEDM), 2010 IEEE International

Date of Conference:

6-8 Dec. 2010