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Reducing the replacement overhead in bus-based COMA multiprocessors

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2 Author(s)
F. Dahlgren ; Dept. of Comput. Eng., Chalmers Univ. of Technol., Goteborg, Sweden ; A. Landin

In a multiprocessor with a Cache-Only Memory Architecture (COMA) all available memory is used to form large cache memories called attraction memories. These large caches help to satisfy shared memory accesses locally, reducing the need for node-external communication. However since a COMA has no back-up main memory, blocks replaced from one attraction memory must be relocated into another attraction memory. To keep memory overhead low, it is desirable to have most of the memory space filled with unique data. This leaves little space left for replication of cache blocks, resulting in that replacement traffic may become excessive. We have studied two schemes for removing the traditional demand for full inclusion between the lower-level caches and the attraction memory: the loose-inclusion and no-inclusion schemes. They differ in efficiency but also in implementation cost. Detailed simulation results show that the replacement traffic is reduced substantially for both approaches, indicating that breaking inclusion is an efficient way to bound the sensitivity for high memory pressure in COMA machines

Published in:

High-Performance Computer Architecture, 1997., Third International Symposium on

Date of Conference:

1-5 Feb 1997