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A new technique to design an inductorless transimpedance amplifier (TIA) is introduced. This technique uses N similar TIAs in parallel configuration to boost the overall bandwidth while keeping the transimpedance gain constant. Using this method, we design and implement a 10-Gb/s inductorless TIA with an active area of only 0.06 mm2 and a differential transimpedance gain of 62 dBΩ in a digital 0.13-μm CMOS process. There is good agreement among the theory, simulation, and experimental results.