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Simple but Effective Heterogeneous Main Memory with On-Chip Memory Controller Support

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4 Author(s)
Xiangyu Dong ; Comput. Sci. & Eng., Pennsylvania State Univ., University Park, PA, USA ; Yuan Xie ; Muralimanohar, N. ; Jouppi, N.P.

System-in-Package (SiP) and 3D integration are promising technologies to bring more memory onto a microprocessor package to mitigate the "memory wall" problem. In this paper, instead of using them to build caches, we study a heterogenous main memory using both on- and off-package memories providing both fast and high-bandwidth on-package accesses and expandable and low-cost commodity off-package memory capacity. We introduce another layer of address translation coupled with an on-chip memory controller that can dynamically migrate data between off-package and off-package memory either in hardware or with operating system assistance depending on the migration granularity. Our experimental results demonstrate that such design can achieve the average effectiveness of 83% of the ideal case where all memory can be placed in high-speed on-package memory for our simulated benchmarks.

Published in:

High Performance Computing, Networking, Storage and Analysis (SC), 2010 International Conference for

Date of Conference:

13-19 Nov. 2010

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