By Topic

Dynamics of Cleaning and Rinsing of Micro and Nano Structures in Single-Wafer Cleaning Tools

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

7 Author(s)
Dhane, K. ; Intel Corp., Chandler, AZ, USA ; Jeongnam Han ; Jun Yan ; Mahdavi, O.
more authors

Surface cleaning of patterned wafers by batch processing has become a challenge as semiconductor fabrication moves deeper into submicron technology nodes and utilizes larger wafer sizes. Many fabrication plants (fabs) have already employed single wafer cleaning tools. A key challenge in the application of single-wafer processing tools, compared to conventional multi-wafer batch tools, is their lower throughput. Typical surface cleaning consists of exposure to a chemistry intended to remove contaminants, followed by rinsing with ultrapure water, followed by drying. To help reduce cycle time and to minimize resource consumption during rinse processes while producing a highly clean surface, a novel in situ metrology has been developed for the detection of trace residual impurities in fine structures of patterned wafers during surface preparation processes. This technology includes both hardware for in situ measurement of impurities and software for process data analysis. The technology can be used for on-line control in existing processes as well as for development and testing of new recipes and processes. In this paper, the effects of the key rinse process parameters such as water flow rate, wafer spin rate, and water temperatures are studied. Successful incorporation of this metrology into surface preparation steps will eliminate dependence on costlier and more time-consuming external analysis techniques.

Published in:

Semiconductor Manufacturing, IEEE Transactions on  (Volume:24 ,  Issue: 1 )