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A 16-channel smart brain sensor SoC is proposed with the integrated digital EEG/ECoG processor (DEEP) to perform multi-dimension feature space analysis algorithms. The DEEP has three processing pipelines to filter out the artifacts, extract the multi-domain features, and interpret the inherent meanings according to the applications. Dedicated accelerators as well as a RISC are embedded to provide efficient computation and flexibility. Processing folding among channels saves the dominating leakage power. 1.4 μW/channel power is achieved after the implementation in 90 nm process.
VLSI Circuits (VLSIC), 2010 IEEE Symposium on
Date of Conference: 16-18 June 2010