By Topic

Thermal limits of flip chip package-experimentally validated, CFD supported case studies

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Lee, T.-Y.T. ; Adv. Interconnect Syst. Labs., Motorola Inc., Tempe, AZ, USA ; Mahalingam, M.

This study projects the thermal performance limits of a flip chip package. A plastic, pin grid array (PGA) package with direct chip attach (DCA) interconnect was chosen for the demonstration purpose. The same methodology as developed here can be applied to other flip chip packages, The design rules chosen are the allowable power dissipation for constraints of junction temperature (⩽105°C) and board temperature (⩽90°C) under either free air or forced air (1.27 m/s) condition. An experimentally validated computational fluid dynamics (CFD) model was used to predict the thermal performance limits of the flip chip package. Simulations were run by increasing the power to the package under consideration until either the junction temperature or the board temperature reached its limit. Based on these constraints, the allowable power dissipation in the package was determined to be between 1.7 and 6.7 W in free air and between 2.1 and 13.7 W in 1.27 m/s of air. The validated CFD models offer enormous potential to quickly assess thermal limits of many future flip chip packages and their variations

Published in:

Components, Packaging, and Manufacturing Technology, Part B: Advanced Packaging, IEEE Transactions on  (Volume:20 ,  Issue: 1 )