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A methodology for concurrent fabrication process/cell library optimization

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3 Author(s)
A. N. Lokanathan ; Dept. of Comput. Sci. & Eng., Notre Dame Univ., IN, USA ; J. B. Brockman ; J. E. Renaud

The paper presents a methodology for concurrently optimizing an IC fabrication process and a standard cell library in order to maximize overall yield. The approach uses the Concurrent Subspace Optimization (CSSO) algorithm, which has been developed for general coupled, multidisciplinary optimization problems. An example is provided showing the application of the algorithm to optimizing a mixed analog/digital library on a CMOS process

Published in:

Design Automation Conference Proceedings 1996, 33rd

Date of Conference:

3-7 Jun, 1996