By Topic

New insight on the charge trapping mechanisms of SiN-based memory by atomistic simulations and electrical modeling

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

16 Author(s)

In this paper, we have studied the charge trapping mechanisms of nitride-based non-volatile memories. The impact of different silicon-nitride (SiN) compositions (standard, std, and Si-rich) on the device characteristics has been investigated through material characterizations, electrical measurements, atomistic and electrical simulations. We found that the different physical nature of the dominant defects in the two SiN compositions is at the origin of the different device electrical behaviors. In particular, we argue that the different electron occupation number of the defect states of the two SiN materials explains the observed faster erasing speed and charge loss rate of Si-rich SiN devices, with respect to std SiN devices, in spite of comparable programming behavior. A simple trap model is proposed to improve state of the art simulators of SiN based memories.

Published in:

Electron Devices Meeting (IEDM), 2009 IEEE International

Date of Conference:

7-9 Dec. 2009