Referenced Items are not available for this document.
The inter-processor communication time is a major bottleneck for distributed memory systems (DMSs) and can be reduced by having an efficient task partitioning and scheduling strategy. The paper deals with the scheduling issues and presents an algorithm to schedule tasks onto DMSs. The complexity of this algorithm is O(V2), where Vr is the number of nodes of the directed acyclic graph (DAG). This algorithm has been applied to some practical DAGs and the results obtained using this algorithm are very promising
Published in:
Parallel and Distributed Processing, 1995. Proceedings. Seventh IEEE Symposium on
Date of Conference: 25-28 Oct 1995
- Page(s):
- 60 - 63
- Meeting Date :
- 25 Oct 1995-28 Oct 1995
- ISSN :
- 1063-6374
- Print ISBN:
- 0-81867195-5
- INSPEC Accession Number:
- 5119666
- Conference Location :
- San Antonio, TX
- Digital Object Identifier :
- 10.1109/SPDP.1995.530665
- Product Type:
- Conference Publications
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