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Quantifying design productivity: an effort distribution analysis

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2 Author(s)
Joshi, M. ; Dept. of Electr. & Comput. Eng., South Carolina Univ., Columbia, SC, USA ; Kobayashi, H.

This paper presents basic process models for textual and graphical HDL-based design. The models are used to measure effort (time) required for various design activities, with an aim to quantify design productivity. Effort-distribution in man-minutes is used as a parameter to evaluate design productivity. Design quality, defined as a probability that the design meets its specifications, is plotted for various design activities. We also discuss the resources that are essential to perform each design activity. These experiments demonstrate that “effort-distribution analysis” is useful for real life HDL-based design projects

Published in:

Design Automation Conference, 1995, with EURO-VHDL, Proceedings EURO-DAC '95., European

Date of Conference:

18-22 Sep 1995