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A stable programming pulse generator for high-speed programming single power supply voltage flash memories

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2 Author(s)
T. Tanzawa ; ULSI Res. Center, Toshiba Corp., Kawasaki, Japan ; T. Tanaka

This paper describes a stable programming pulse generator to reduce not only the pumping-up time under a low power supply voltage condition, but also the power consumption under a high power supply voltage condition. Moreover, the fluctuation of the programming pulse width is controlled within /spl plusmn/0.5% under the condition of a power supply voltage fluctuation of /spl plusmn/20%. As a result, the increase of the programming pulse width under the low voltage condition is eliminated, and the total programming time can be reduced by about 30%. Furthermore, the proposed 10/spl mu/s delay circuit area can be reduced to 42% of the conventional one.

Published in:

VLSI Circuits, 1995. Digest of Technical Papers., 1995 Symposium on

Date of Conference:

8-10 June 1995