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Accurate parasitic resistance extraction for interconnection analysis

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3 Author(s)
Yucheng Wang ; Dept. of Electr. & Comput. Eng., Duke Univ., Durham, NC, USA ; Overhauser, D. ; Basel, M.

With the further scaling down of feature sizes, parasitic resistance is becoming more important for interconnection analysis. Previous resistance modeling and extraction methods either sacrifice too much speed for accuracy or sacrifice too much accuracy for speed. Neither of which is sufficient for effective interconnection analysis. In this paper we present a parasitic resistance extraction methodology which is both fast and accurate. The strategy is to fracture the resistive polygons into regions of different electromagnetic complexity and then use different algorithms to solve each region of complexity. Experimental results show that extracted resistances are within 5% of pure FEM resistance extraction for most test cases and within 10% for a few extreme cases while performing the extraction only about an order of magnitude slower than the path-finding parasitic resistance extraction technique

Published in:

Custom Integrated Circuits Conference, 1995., Proceedings of the IEEE 1995

Date of Conference:

1-4 May 1995