By Topic

A stereo vision processor

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

4 Author(s)
R. Lane ; Dept. of Electron. & Electr. Eng., Sheffield Univ., UK ; N. Thacker ; L. Seed ; P. Ivey

This paper describes a chip designed to perform high-precision image rectification for a computer vision application stereo vision. The very high level of mathematical integrity which is required is not supported by commercial image warping devices. A two-layer metal 1 μm CMOS process was used, and the chip operates at 20 MHz. The chip can “rectify” a 256×256 image at 25 frames/s and allows truly arbitrary image warps

Published in:

Custom Integrated Circuits Conference, 1995., Proceedings of the IEEE 1995

Date of Conference:

1-4 May 1995