By Topic

Special memory and embedded memory macros in MPEG environment

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

16 Author(s)
G. Otomo ; Semicond. Device Eng. Lab., Toshiba Corp., Kawasaki, Japan ; H. Hara ; T. Oto ; K. Seta
more authors

Special memory and embedded memories used in a newly designed MPEG2 decoder LSI are described. Orthogonal memory is employed in a IDCT (Inverse Discrete Cosine Transform) block for small area and power. FIFOs and other dual-port memories are designed by using a single-port RAM operated twice in one clock cycle to reduce cost. As for testability, direct test mode is implemented for small area. An instruction RAM is placed outside the pad area in parallel to a normal instruction ROM and activated by Al-masterslice for extensive debugging and an early sampling. Other memory related techniques and the key features of the decoder are also described

Published in:

Custom Integrated Circuits Conference, 1995., Proceedings of the IEEE 1995

Date of Conference:

1-4 May 1995