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Development of Ultrabroadband (DC–50 GHz) Wafer-Scale Packaging Method for Low-Profile Bump Flip-Chip Technology

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2 Author(s)
Young Seek Cho ; Dept. of Electr. & Comput. Eng., Univ. of Minnesota, Minneapolis, MN, USA ; Franklin-Drayton, R.

A locally matched flip-chip (LMFC) interconnect that uses a capacitive compensation technique to minimize impedance mismatch in coplanar waveguide lines is described. With an optimum percentage change in capacitance of 55plusmn5%, we observe return loss below 25 dB over 90% of a 50 GHz bandwidth. When compared to a conventional flip-chip method, the minimum performance improvement in return loss is 10 dB and the insertion loss is smooth up to 30 GHz. The LMFC interconnect consists of two micromachined features: 1) an air cavity underneath the chip and 2) local trenches in the transition region of the flip-chip interconnect interface. A comparison of different LMFC interconnect designs to the conventional flip-chip approach is made, and design rules to obtain local trench dimensions are discussed.

Published in:

Advanced Packaging, IEEE Transactions on  (Volume:32 ,  Issue: 4 )