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Hades-towards the design of an asynchronous superscalar processor

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4 Author(s)
Elston, C.J. ; Div. of Comput. Sci., Hertfordshire Univ., Hatfield, UK ; Christianson, D.B. ; Findlay, P.A. ; Steven, G.B.

This paper uses Hades, a generic processor architecture aimed at single and multiple-instruction-issue asynchronous implementations, to illustrate some of the difficulties encountered in asynchronous processor design. Particular emphasis is placed on a decoupled operand forwarding mechanism which allows the last result of each functional unit to be forwarded to following instructions, yet completely separates forwarding from the register writeback operation

Published in:

Asynchronous Design Methodologies, 1995. Proceedings., Second Working Conference on

Date of Conference:

30-31 May 1995