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A high yield 12-bit 250-MS/s CMOS D/A converter

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3 Author(s)
J. Bastos ; ESAT, Katholieke Univ., Leuven, Belgium ; M. Steyaert ; W. Sansen

A 12-bit linearity binary-weighted all MOS transistor D/A converter is presented. Experimental results demonstrate the feasibility of fabricating with high yield such a converter in a standard CMOS 0.7 μm technology. The output drives a doubly terminated 50 Ω coaxial cable. The full scale 10-90% rise/fall time is 4 ns. The active chip area is 1 mm2

Published in:

Custom Integrated Circuits Conference, 1996., Proceedings of the IEEE 1996

Date of Conference:

5-8 May 1996