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Poly-Si/TiN/HfO2 gate stack etching in high-density plasmas

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7 Author(s)
le Gouil, A. ; Laboratoire des Technologies de la Microélectronique, CNRS-UJF-INPG, 17 rue des Martyrs (c/o CEA-LETI), Minatec, 38054 Grenoble Cedex 9, France ; Joubert, O. ; Cunge, G. ; Chevolleau, T.
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The authors have investigated the dry etch mechanisms of complex poly-Si/TiN/HfO2 gate stacks and the issues that are correlated with the introduction of a thin metal layer in the gate stack. Based on atomic force microscopy (AFM) and scanning electron microscope measurements, they will first show that a mixture of HBr and Cl2 at low rf bias power is required to successfully pattern the TiN layer without damaging the HfO2 gate oxide. Second, it is demonstrated that the introduction of a metal layer in the gate stack prevents charging effects during the last etching steps of the silicon part of the gate. Transmission electron microscope measurements and x-ray photoelectron spectroscopy analyses of the gate sidewalls show that the thickness of the silicon sidewall passivation layer decreases during the O2 free metal etching step potentially inducing silicon gate profile distortion such as notch. However, the notch can be eliminated by etching the Si/TiN gate in a single step process instead of stopping at the TiN surface. Finally, AFM measurements show that during the TiN etching step, a low rf bias power is required to prevent damage (punching through) of the HfO2 layer. However, even under these conditions, a significant silicon recess (oxidation of the c-Si beneath the HfO2 layer) is observed even if TiN is etched in an O2-free chemistry.

Published in:

Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures  (Volume:25 ,  Issue: 3 )

Date of Publication:

May 2007

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