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Characterization of atomic-layer-deposited silicon nitride/SiO2 stacked gate dielectrics for highly reliable p-metal-oxide-semiconductor field-effect transistors

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7 Author(s)
Nakajima, Anri ; Research Center for Nanodevices and Systems, Hiroshima University 1-4-2 Kagamiyama, Higashi-Hiroshima, Hiroshima 739-8527, Japan ; Yoshimoto, Takashi ; Kidera, Toshirou ; Obata, Katsunori
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An extremely thin (∼0.4 nm) silicon nitride layer has been deposited on thermally grown SiO2 by an atomic-layer-deposition (ALD) technique. The ALD silicon nitride is thermally stable as confirmed by x-ray photoelectron spectroscopy. The surface microroughness measured using atomic force microscopy is extremely small (average surface microroughness Ra of 0.031 nm) for the ALD silicon nitride on SiO2, especially in the thin thickness region (≪0.5 nm). A smooth interface between the ALD silicon nitride and the poly-Si gate was also confirmed by transmission electron microscopy. The ALD technique allows us to fabricate an extremely thin, very uniform silicon nitride layer with atomic scale control. The boron penetration through the stacked gate dielectrics has dramatically been suppressed, and the reliability of the metal-oxide-semiconductor diodes with the stacked gate dielectrics has been significantly improved as confirmed by capacitance–voltage, gate current–gate voltage, and time-dependent dielectric-breakdown characteristics. © 2001 American Vacuum Society.

Published in:

Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures  (Volume:19 ,  Issue: 4 )