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As we enter the era of ultra‐large‐scale integrated circuit manufacture, plasma etching grows more important for fabricating structures with unprecedented dimensions. For feature sizes below 1 μm and aspect ratios (depth/width) much larger than one, etching rates have been observed to depend on aspect ratio and pattern density. Such dependencies tend to increase the cost of manufacturing because even small changes in device design rules, cell design, or wafer layout can result in time‐consuming, new plasma process development. In addition, microscopically nonuniform etching affects the trade‐off between chips lost from failure to clear and chips lost by damage from overetching. Although aspect ratio and pattern dependent etching have been observed for a large variety of material systems and processing conditions, the fundamental causes underlying these effects are poorly understood. Partly, this results from use of confusing and conflicting nomenclature and a lack of careful, quantitative comparisons between experiment and theory. In this article we review recent literature on microscopic uniformity in plasma etching and carefully define terminology to distinguish between aspect ratio dependent etching (ARDE) and the pattern dependent effect known as microloading. For ARDE, we use dimensional analysis to narrow the range of proposed mechanisms to four which involve ion transport, neutral transport, and surface charging. For microloading, we show that it is formally equivalent to the usual loading effect, where the reactant concentration is depeleted as a result of an excessive substrate load.