Minimizing the electrical losses on the front side: Development of a selective emitter process from a single diffusion

In this paper we present latest results in the development of a process for the fabrication of a selective emitter structure on mono- and multicrystalline silicon solar cells. The process is based on an approach that was first introduced by Zerga et al. [1]. We have chosen a wet chemical route for an emitter etch back where the areas of the wafer that are intended for emitter metallization are shielded from etching by a screen printable etch barrier. The etch barrier is later removed by wet chemical etching. The process has yielded a gain in open circuit voltage of more than 1% and a gain in short circuit current of more than 2%. The overall efficiency gain was more than 0.3%abs due to slightly lower fill factor of the cells.