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3D Simulation Study of Cell-Cell Interference in Advanced NAND Flash Memory

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6 Author(s)
Haitao Liu ; Dept. of Process R&D, Micron Technol. Inc, Boise, ID ; Groothuis, Steve ; Mouli, C. ; Li, Jian
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A new Technology CAD (TCAD) methodology has been applied to accurately extract cell-cell interference. The new method uses a "DeltaVt ratio" model instead of the conventional "capacitance ratio" model. The new method will be introduced and validated by recent experimental data. The predictions of the cell-cell interference on sub-40 nm floating gate (FG) cells and charge trapped flash (CTF) cells will be discussed. Finally, the implications and challenges of Multilevel Cell (MLC) applications will be made.

Published in:

Microelectronics and Electron Devices, 2009. WMED 2009. IEEE Workshop on

Date of Conference:

3-3 April 2009