This paper presents a flexible fully integrated self-calibrated quad-core 12-bit current-steering 180 nm CMOS DAC. Its novel architecture features multiple parallel sub-DAC unit cores. Their various combinations deliver smart flexibility in: performance, functionality, power management, design reuse, and smartness. The parallel sub-DAC units can be used together or separately to optimize the performance of a targeted mixed-signal application. Unused sub-DAC units can be switched off to optimize the power consumption. The new parallel sub-DACs architecture facilitates a new calibration algorithm. This algorithm together with small calibrating DACs and a current comparator enables the realization of the first fully integrated self-calibration start-up method that corrects the mismatch errors of all binary and unary current sources. The presented self-calibrated flexible DAC achieves measured linearity of better than 12-bit, while occupying small silicon area due to the intrinsic 9-bit accuracy of the DAC unit core.
Published in:
Circuits and Systems, 2008. APCCAS 2008. IEEE Asia Pacific Conference on
Date of Conference: Nov. 30 2008-Dec. 3 2008