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Flow control in Output Buffered Switch with Input Groups

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4 Author(s)
Olesinski, W. ; Sun Microsyst. Labs., Menlo Park, CA ; Eberle, H. ; Gura, N. ; Chrysos, N.

We have recently proposed a novel architecture called Output Buffered Switch with Input Groups (OBIG) together with a scheduler called Parallel Wrapped Wave Front Arbiter with Fast Scheduler (PWWFA-FS) for building large, fast switches. In this paper we continue this work and tackle the issue of flow control. We show how on/off and credit flow control schemes can be applied in OBIG; we further introduce implicit flow control that does not use any explicit control information. Simulation results show how the proposed flow control schemes perform in our architecture.

Published in:

High Performance Switching and Routing, 2008. HSPR 2008. International Conference on

Date of Conference:

15-17 May 2008