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Multisynchronous and Fully Asynchronous NoCs for GALS Architectures

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3 Author(s)

Networks on chips constitute a new design paradigm for communication infrastructures in large multiprocessor SoCs. NoCs can use the GALS technique to address the difficulty of distributing a synchronous clock signal on the entire chip area. This article describes two approaches to implementing a distributed NoC in a GALS environment.

Published in:

Design & Test of Computers, IEEE  (Volume:25 ,  Issue: 6 )