By Topic

Voltage-Controlled Relaxation Oscillations in Phase-Change Memory Devices

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
Daniele Ielmini ; Dipt. di Elettron. e Inf., Politec. di Milano, Milan ; Davide Mantegazza ; Andrea L. Lacaita

A new oscillation behavior in a phase-change memory device is presented and analyzed. The device consists in a chalcogenide resistor with a parallel capacitance and no inductance. Biasing the device immediately after a proper trigger pulse leads to damped relaxation oscillations, which can be controlled in frequency by the bias voltage. The oscillation mechanism is explained by repetitive cycles of threshold switching and recovery of the high-resistance (off) state of the amorphous chalcogenide region in the device. Damping is explained by oscillation-induced phase change in the chalcogenide layer.

Published in:

IEEE Electron Device Letters  (Volume:29 ,  Issue: 6 )