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We describe a formalism for quantifying the performance of spike-based winner-take-all (WTA) VLSI chips. The WTA function nonlinearly amplifies the output responses of pixels/neurons dependent on the input magnitudes in a decision or selection task. In this paper, we show a theoretical description of this WTA computation which takes into consideration the input statistics, neuron response variance, and output rates. This analysis is tested on a spiking VLSI neuronal network fabricated in a 4-metal, 2-poly 0.35-mum CMOS process. The measured results of the WTA performance from this chip correspond to the theoretical prediction. This formalism can be applied to any implementation of spike-based neurons.