By Topic

Designing analog and RF circuits for ultra-low supply voltages

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

1 Author(s)
Peter R. Kinget ; Dept. of Electrical Engineering, Columbia University, New York, 10027, USA

This paper investigates the challenges and opportunities of designing analog and RF integrated circuits to operate from ultra-low supply voltages. Solutions ranging from exploiting the 4 terminals of a MOS device or the threshold voltage dependence on length, to the use of circuit topologies that require only stacks of two devices are discussed. The realization of full analog and RF system functions operating from ultra-low voltages is demonstrated and the enabling architecture modifications are introduced. The techniques and results presented in this paper aim to enable ultra-low voltage analog and RF circuits both in the context of relatively large threshold voltages, e.g., |VT|=VDD, as well as lower threshold voltages.

Published in:

Solid State Circuits Conference, 2007. ESSCIRC 2007. 33rd European

Date of Conference:

11-13 Sept. 2007