By Topic

Superior n-MOSFET performance by optimal stress design

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

6 Author(s)
Y. -J. Yang ; Department of Electrical Engineering, National Taiwan University, Taipei, China ; M. H. Liao ; C. W. Liu ; Lingyen Yeh
more authors

In this article we present detailed stress simulation characterization of the 3-D boundary effects and show that the high-performance n FET can be achieved by the ultra-high-stress CESL stressor and optimal geometric structure design. A symmetric structure which results in the biaxial- like stress is favored for n FET in terms of Ion, Bsat rsat, and vnj. The comprehensive study helps the future device circuit design and remains valid for future technology node of 22 nm.

Published in:

Semiconductor Device Research Symposium, 2007 International

Date of Conference:

12-14 Dec. 2007