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Electrical interconnections may be formed along the edges of stacked integrated circuits by an extrusion process that utilizes automated needle dispense equipment to form local deposits of conductive/adhesive polymer paste. This vertical interconnect process has been designed to form three- dimensional circuits without the imposition of significant mechanical forces that are known to cause mechanical damage to thin die or fragile substrate materials. The process has been demonstrated for both shingle-tier and vertical-stack configurations with productivity rates that exceed 100 interconnections per minute. Die-stacks of up to 128 chips have been demonstrated however, no current functional application can employ this design. In comparison with existing manufacturing methods for standard stacked-die packages, substantial packaging cost reductions are realized with this gang-based process due to the elimination of repeated die attach and pad-based wirebond processing steps, and the reduction or elimination of gold within the device.