By Topic

1.3–1.55-μ m CMOS/InP Optoelectronic Receiver Using a Self-Aligned Wafer Level Integration Technology

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Hasan Sharifi ; Purdue Univ., West Lafayette ; Saeed Mohammadi

A heterogeneous 10-Gb/s 1.3- to 1.55-mum optoelectronic receiver is designed and fabricated using a complementary metal-oxide-semiconductor transimpedance amplifier and an InGaAs-InP PIN (p-type, intrinsic, n-type diode) photodiode. The receiver is heterogeneously integrated based on a batch fabrication process which promises low fabrication cost. The receiver measures a transimpedance gain of higher than 50 dBldrOmega over a bandwidth of 6 GHz and demonstrates an open eye diagram with a 1.55-mum 10-Gb/s light source.

Published in:

IEEE Photonics Technology Letters  (Volume:19 ,  Issue: 14 )