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Assembly Yields Characterization of High IO Density, Fine Pitch Flip Chip in Package Using No-Flow Underfill

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4 Author(s)
Sangil Lee ; Advanced Assembly Process Technology - AdAPT Laboratory, The George W. Woodruff School of Mechanical Engineering, Georgia Institute of Technology, Atlanta, Georgia 30332-0405 ; Daniel F. Baldwin ; Raj Master ; Srinivasan Parthasarathy

The application of no-flow underfills for high IO density, fine-pitch, flip chip in package (FCIP) applications is analyzed. A number of commercially developed no flow underfills are evaluated. Process parameters for improved assembly yields depend strongly on the underfill materials characteristics and particularly the reflow profile. The test vehicles used in this study incorporate high I/O density, large chip size, and small interconnect pitch. This paper presents a methodology for evaluating new commercial no flow underfill materials, techniques for establishing baseline reflow profiles for yielding FCIP devices, and initial yield sensitivity analysis for the FCIP assembly process.

Published in:

2007 Proceedings 57th Electronic Components and Technology Conference

Date of Conference:

May 29 2007-June 1 2007